1. Field of the Invention
The present invention relates to a semiconductor device and in particular to a semiconductor device having extremely fine dimensions suitable for high density integration and to a method for fabricating same.
2. Description of the Related Art
In a prior art method for fabricating a semiconductor device having a gate electrode and a pair of spaced impurity diffused layers serving as a drain layer and a source layer, as disclosed for example in JP-A-63-144,573, 2-58,374, 2-174,236, 4-234,131, 4-234,132, a side wall made of oxide is formed on the side surfaces of the gate electrode and an insulating film is formed so as to cover the surface of the side wall. Thereafter the insulating film is subjected to anisotropic etching in order to form a contact hole reaching one of the diffused layers through the insulating film so that the side wall is not etched. Then a conductive layer made of a conductive material electrically connected with the diffused layer through the contact hole is formed so as to extend on the insulating film.
However, if the distance between the contact hole and the gate electrode is decreased in order to make the semiconductor device still finer, the side wall is also etched, when the insulating film is subjected to anisotropic etching for forming the contact hole until the diffused layer is exposed, which gives rise to a problem that leak current from the gate electrode to the conductive layer through the contact hole is produced.